What is the realistic principle of segment LCD? How to design it?
In fact, the relationship between the driving waveform and the LCD display is very simple. Only remember that the LCD cannot be applied with direct current. Which waveforms are used to make an exchange driving voltage signal. Although the waveforms of COM and SEG seem complicated, they are actually very simple. COM is a sequence. Sweep the pulse sequence, cyclical emergence, whether it is lit or not can only be seen by the superimposed pressure difference relationship between the COM and SEG waveforms.
For example, the 3V 1/2bias drive chips COM and SEG should light up the liquid crystal. Only when COM is 3V, SEG is OV or COM is OV, SEG is 3V, and it is not lit in other cases.
Bias refers to the bias coefficient of the liquid. Simply put, it indicates the number of steps of the driving voltage. 3v 1/2bias has three voltages 3v 1.5v Ov, and 3v 1/3bias has four voltages 3v 2v 1v Ov, but they are all 3v liquid crystals. The block lights up, now you know what 1/2bias and 1/3bias can calculate. The greater the number of biases, the more obvious the difference between bright and non-bright, which improves the contrast between bright and dark.
There are not too many specific materials in this regard. In fact, it is the fastest way to read the specifications of different LCD driver chips. There is also something that can be searched for some basic principles of liquid crystal on the Internet, but there are fewer ordinary black and white ones, but more STN and TFT ones.
How to split and cut LCD screens?
1. Fmark function of LCM
When debugging the R61509V LCM driver chip recently, there was a Tearing Effect (TE) problem in the screen refresh under the solid color test screen. The basic reason is that the speed at which the master writes image data is inconsistent with the speed at which the LCM refreshes the screen. In detail, the refresh speed is faster than the master write speed. Fortunately, many LCM driver chips have an Fmark pin to synchronize with the main control. When Fmark sends a signal to the main control, the main control starts to write a frame of data, so that the two sides can be synchronized. Before telling the story, first describe a few concepts:
(1) Refreshing speed
The refresh rate refers to the refresh rate of the LCM. This value is individually set in the initialization CODE of the LCM. For Renesas’ R61509V LCD driver, setting the Ox0010 register is to set the refreshing speed. According to the formula: frame rate=678KHZ/{(RTN)*DIN*(432+8+8)}, where 678K is the clock source inside the LCM, RTN is the number of clocks per line, DIV is the frequency division coefficient, (432+ 8+8) are line pixels. The measured result is:
0X011F 20HZ, minimum frequency.
ox011A 29HZ
0X0115 36HZ
oX0110 52HZ
ox001C 60HZ
oX0018 70HZ
0X001480Hz
Too low screen rate will cause flicker phenomenon, so it is generally set above 60HZ.
(2) Master control write speed WR and chip select CS
These two PIN feet have each LCM of DBI, and the working frequency of the two is the same. Each time the master writes a frame of data, there will be a chip select signal, which corresponds to a WR write valid signal. The change of the writing frequency of the master control is selected by the duty state. For example, when shooting, the display writing speed of shooting dynamic objects is faster than the display writing speed of shooting static objects.
If the screen is not updated, the LCD will be updated every 70ms. If the screen is moving, the screen will be refreshed once at most 33ms. This means that the CS frequency can only be limited to 1/70 to 1/30, 14.28HZ to 33.33HZ. The highest frequency is already faster than the frame rate of PAL or NTSC, which can ensure that no frame loss occurs when the camera is working or playing video.
(3) Fmark function
To enable fmark, you must first ensure that the fmark pin of the master control is accurately connected to the fmark pin of the LCM; secondly, you must enable the fmark function of the screen during LCM initialization to ensure that the LCM periodically sends signals to the master, and at the same time enables the master The fmark function of the control ensures that the main control receives a fmark signal before writing a frame of data.
LCM's fmark has two parameters that can be configured: one is how many times the screen is swiped to send an fmark signal, for example, it is not necessary to send an fmark signal every time the screen is swiped, but it can be sent once a fmark signal when swiping the screen several times; the second is the position parameter of fmark , Can make the fmark output delay several lines, the purpose is to let the master write data to GRAM later to avoid TE.
Example: There is a situation where the IC outputs the te signal after reading the last line from GRAM, and BB starts writing to GRAM at this time. But it may take one or two lines before the IC starts to read the data from the first row of GRAM and flushes the second frame, and the speed of writing GRAM is slower than that of IC reading GRAM, and writing may not have started yet. As a result, reading GRAM exceeds writing GRAM, so tearing will occur at the top. It is necessary to prevent TE output from being too early, causing writing to GRAM to start first, so add a delay to ensure that writing to GRAM starts after reading old data.
(4) fmark cycle and CS cycle
The basic cause of the TE scene is the inconsistency of the speeds on both sides. The details are that the refresh speed of the LCM is faster than the speed of the main control sending data, and the speed of the two must match a certain scale. It is only necessary to ensure that the CS cycle is between two TE cycles, that is, the writing frequency of CS cannot be lower than one-half of the reading frequency of TE. The basic condition for the emergence of tearing is that there are interspersed reading and writing. Generally, the writing Gram speed (WR) is slower than the LCD refreshing speed (TE) [x2]. As long as the refreshing position does not exceed the writing Gram position, there will be no screen cut.
For example, CS is almost a bit shorter than two TE cycles. To refresh the data of two frames, first the first frame refreshing starts to refresh the screen, indicating the start of reading GRAM, its speed is relatively fast, and it reads old Data; Immediately after the master starts to write GRAM, about half of the time when writing to GRAM, one frame has been swiped at this time, and then the second frame is swiped, that is, it starts to read and swipe the screen from the top of GRAM, and then read What comes out is the new data that has just been written. Before the GRAM is written, the read step must never keep up with the write step, and there will be no tearing.
If CS is larger than two TE cycles, if it is equivalent to three TE cycles, then as long as the third TE read cycle, the displayed data is the written GRAM data; the first TE reads the old one Data, in the second TE cycle, because GRAM has not been written yet, but the read step has caught up with the write GRAM stepper, resulting in an explicit part of the old part of the new, so TE appears. This is the essence.
(5) TE type
When TE display is enabled, it is necessary to ensure that both the LCD TE enable of the CPU and the TE function of the LCM drive are turned on. There are two types of TM enable for LCM: VSYSc, vSYNCHSYNC.
